The resistor divider (390kΩ/100kΩ) keeps the ADC pin voltage in the
0.61-0.86V range across the full LiPoly range (3.0–4.2V). ADC_2_5db
(~1250mV full-scale) uses ~70% of the ADC range at full charge, giving
better resolution than the default ADC_11db (~20%) while maintaining
headroom over ADC_0db (~950mV) to handle chip-to-chip ADC variation
Correct ADC_MULTIPLIER from 5.42 to 4.9 to match the R27/R28 resistor
divider on the schematic (390kΩ + 100kΩ) / 100kΩ = 4.9.
Also switch from analogRead() with manual 3.3V/1024 conversion to
analogReadMilliVolts() at 12-bit resolution, which uses the ESP32's
built-in ADC calibration for improved accuracy.
Schematic reference: https://resource.heltec.cn/download/WiFi_LoRa_32_V4
Enable GPS time synchronization across all variants by passing
&rtc_clock to MicroNMEALocationProvider. When GPS gets a valid
fix, the RTC clock is now updated automatically every 30 minutes.
Updated 16 variants: rak4631, lilygo_tbeam_SX1262, rak_wismesh_tag,
lilygo_tbeam_supreme_SX1262, thinknode_m3, heltec_v4, thinknode_m1,
lilygo_tbeam_SX1276, meshadventurer, nano_g2_ultra, heltec_v3,
promicro, xiao_c3, heltec_tracker_v2, keepteen_lt1, heltec_mesh_solar.
The GC1109 FEM needs its VFEM_Ctrl pin held HIGH during deep sleep
to keep the LNA active, enabling proper RX sensitivity for
wake-on-packet. Without this, the LNA is unpowered during sleep
and RX wake sensitivity is degraded by ~17dB.
Release RTC holds in begin() after configuring GPIO registers
(not before) to ensure glitch-free pin transitions on wake.
Trade-off: ~6.5mA additional sleep current for significantly
improved wake-on-packet range.