diff --git a/variants/nicerf_lr2021/target.cpp b/variants/nicerf_lr2021/target.cpp index b98ddfb8..8737d6a0 100644 --- a/variants/nicerf_lr2021/target.cpp +++ b/variants/nicerf_lr2021/target.cpp @@ -1,12 +1,22 @@ #include #include "target.h" -#include "EspIdfHal.h" NiceRFLR2021Board board; +// On ESP32-C3, FSPI (SPI peripheral 0) is the only general-purpose SPI bus. +// Using SPIClass(0) per maintainer suggestion. If this returns all-zeros on +// your board, define USE_ESPIDF_HAL in platformio.ini to use the ESP-IDF SPI +// HAL workaround (see EspIdfHal.h for details). +#ifdef USE_ESPIDF_HAL +#include "EspIdfHal.h" static EspIdfHal hal(P_LORA_SCLK, P_LORA_MISO, P_LORA_MOSI); RADIO_CLASS radio(new Module(&hal, P_LORA_NSS, P_LORA_DIO_1, P_LORA_RESET, P_LORA_BUSY)); +#else +static SPIClass spi(0); +RADIO_CLASS radio(new Module(P_LORA_NSS, P_LORA_DIO_1, P_LORA_RESET, + P_LORA_BUSY, spi)); +#endif WRAPPER_CLASS radio_driver(radio, board); ESP32RTCClock fallback_clock; @@ -24,7 +34,11 @@ bool radio_init() { fallback_clock.begin(); rtc_clock.begin(Wire); +#ifndef USE_ESPIDF_HAL + spi.begin(P_LORA_SCLK, P_LORA_MISO, P_LORA_MOSI, P_LORA_NSS); +#else hal.init(); +#endif return radio.std_init(NULL); }