mirror of https://github.com/meshcore-dev/MeshCore
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32 changed files with 192 additions and 46 deletions
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#pragma once |
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#include <RadioLib.h> |
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// Full receiver reset for LR11x0-family chips (LR1110, LR1120, LR1121).
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// Warm sleep powers down analog, calibrate(0x3F) refreshes all calibration blocks,
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// then re-applies RX settings that calibration may reset.
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inline void lr11x0ResetAGC(LR11x0* radio, float freqMHz) { |
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radio->sleep(true, 0); |
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radio->standby(RADIOLIB_LR11X0_STANDBY_RC, true); |
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radio->calibrate(RADIOLIB_LR11X0_CALIBRATE_ALL); |
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// calibrate(0x3F) defaults image calibration to 902-928MHz band.
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// Re-calibrate for the actual operating frequency (band=4MHz matches RadioLib default).
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radio->calibrateImageRejection(freqMHz - 4.0f, freqMHz + 4.0f); |
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#ifdef RX_BOOSTED_GAIN |
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radio->setRxBoostedGainMode(RX_BOOSTED_GAIN); |
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#endif |
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} |
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#pragma once |
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#include <RadioLib.h> |
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// Full receiver reset for all SX126x-family chips (SX1262, SX1268, LLCC68, STM32WLx).
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// Warm sleep powers down analog, Calibrate(0x7F) refreshes ADC/PLL/image calibration,
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// then re-applies RX settings that calibration may reset.
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inline void sx126xResetAGC(SX126x* radio) { |
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radio->sleep(true); |
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radio->standby(RADIOLIB_SX126X_STANDBY_RC, true); |
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uint8_t calData = RADIOLIB_SX126X_CALIBRATE_ALL; |
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radio->mod->SPIwriteStream(RADIOLIB_SX126X_CMD_CALIBRATE, &calData, 1, true, false); |
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radio->mod->hal->delay(5); |
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uint32_t start = millis(); |
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while (radio->mod->hal->digitalRead(radio->mod->getGpio())) { |
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if (millis() - start > 50) break; |
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radio->mod->hal->yield(); |
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} |
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// Calibrate(0x7F) defaults image calibration to 902-928MHz band.
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// Re-calibrate for the actual operating frequency.
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radio->calibrateImage(radio->freqMHz); |
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#ifdef SX126X_DIO2_AS_RF_SWITCH |
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radio->setDio2AsRfSwitch(SX126X_DIO2_AS_RF_SWITCH); |
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#endif |
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#ifdef SX126X_RX_BOOSTED_GAIN |
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radio->setRxBoostedGainMode(SX126X_RX_BOOSTED_GAIN); |
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#endif |
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#ifdef SX126X_REGISTER_PATCH |
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uint8_t r_data = 0; |
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radio->readRegister(0x8B5, &r_data, 1); |
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r_data |= 0x01; |
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radio->writeRegister(0x8B5, &r_data, 1); |
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#endif |
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} |
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